Giovanni De Micheli

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Giovanni De Micheli
OccupationElectrical engineer and educator
Academic background
Alma mater
ThesisComputer-Aided Synthesis of PLA-Based Systems
Doctoral advisorAlberto Sangiovanni-Vincentelli
Academic work
Discipline
  • Electrical engineering
  • Computer science
Sub-discipline
Institutions
Doctoral students

Giovanni De Micheli is Professor and Director of the Institute of Electrical Engineering and of the Integrated Systems Centre at École Polytechnique Fédérale de Lausanne (EPFL), Switzerland. He is program leader of the Nano-Tera.ch program. Previously, he was Professor of Electrical Engineering at Stanford University. He holds a Nuclear Engineer degree (Politecnico di Milano, 1979), a M.S. and a Ph.D. degree in Electrical Engineering and Computer Science (University of California, Berkeley, 1980 and 1983) under Alberto Sangiovanni-Vincentelli.[2][3][4]

De Micheli is a Fellow of ACM and IEEE and a member of the Academia Europaea.[2] He is also appointed as an AAAS Fellow.[5] In 2016, he was also awarded the Harry H. Goode Memorial Award for his seminal contributions to design and design tools for networks on chips.[2][6] His research interests include several aspects of design technologies for integrated circuits and systems, such as synthesis for emerging technologies, networks on chips and 3D integration. He is also interested in heterogeneous platform design including electrical components and biosensors, as well as in data processing of biomedical information. He is author of Synthesis and Optimization of Digital Circuits (McGraw-Hill, 1994)[7] and co-author and/or co-editor of several other books.[8]

Prof. De Micheli is the recipient of the 2012 IEEE/CAS Mac Van Valkenburg award for contributions to theory, practice and experimentation in design methods and tools and of the 2003 IEEE Emanuel R. Piore Award for contributions to computer-aided synthesis of digital systems.[9]

He has chaired several conferences, including DATE (2010),[10] pHealth (2006), VLSI SOC (2006),[11] DAC (2000) and ICCD (1989).[12][2]

His PhD students include Luca Benini and Rajesh K. Gupta.[13]

Selected publications

  • Benini, Luca, and Giovanni De Micheli. "Networks on chips: A new SoC paradigm." computer 35.1 (2002): 70–78.
  • De Micheli, Giovanni. Synthesis and optimization of digital circuits. No. BOOK. McGraw Hill, 1994.
  • Benini, Luca, and Giovanni DeMicheli. Dynamic power management: design techniques and CAD tools. Springer Science & Business Media, 1997.
  • Murali, Srinivasan, and Giovanni De Micheli. "Bandwidth-constrained mapping of cores onto NoC architectures." Proceedings design, automation and test in Europe conference and exhibition. Vol. 2. IEEE, 2004.
  • Bertozzi, Davide, Antoine Jalabert, Srinivasan Murali, Rutuparna Tamhankar, Stergios Stergiou, Luca Benini, and Giovanni De Micheli. "NoC synthesis flow for customized domain specific multiprocessor systems-on-chip." IEEE transactions on parallel and distributed systems 16, no. 2 (2005): 113–129.
  • Benini, Luca, and Giovanni de Micheli. "System-level power optimization: techniques and tools." ACM Transactions on Design Automation of Electronic Systems (TODAES) 5.2 (2000): 115–192.

References

  1. ^ "Giovanni De Micheli". Giovanni De Micheli. Retrieved 4 September 2022.
  2. ^ a b c d "Giovanni De Micheli | IEEE Computer Society". Retrieved 2 May 2022.
  3. ^ "Computer-Aided Synthesis of PLA-Based Systems". Technical Reports. Retrieved 4 September 2022.
  4. ^ "Giovanni de Micheli". The Mathematics Genealogy Project. Retrieved 4 September 2022.
  5. ^ "2021 AAAS Fellows | American Association for the Advancement of Science". [American Association for the Advancement of Science]]. Retrieved 2 May 2022.
  6. ^ "Harry H. Goode Memorial Award | IEEE Computer Society". Retrieved 2 May 2022.
  7. ^ De Micheli, Giovanni, ed. (1994). Synthesis and Optimization of Digital Circuits. McGraw Hill. ISBN 978-0-07-016333-1.
  8. ^ "Giovanni De Micheli". Google Scholar. Retrieved 21 May 2022.
  9. ^ "IEEE Emanuel R. Piore Award Recipients" (PDF). IEEE. Archived from the original (PDF) on 24 November 2010. Retrieved 20 March 2021.
  10. ^ "Proceedings of the Conference on Design, Automation and Test in Europe". Design Automation and Test in Europe. Retrieved 21 May 2022.
  11. ^ Micheli, Giovanni De; Mir, Salvador; Reis, Ricardo (23 August 2010). VLSI-SoC: Research Trends in VLSI and Systems on Chip: Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2006), October 16-18, 2006, Nice, France. Springer. ISBN 978-0-387-74909-9.
  12. ^ "21st Asia and South Pacific Design Automation Conference (ASP-DAC 2016)". ASP Design Automation Conference. Retrieved 21 May 2022.
  13. ^ "Automatic synthesis of sequential circuits for low power dissipation - ProQuest". www.proquest.com. Retrieved 2 May 2022.

External links

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