File:DTL NAND Gate.svg
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Size of this PNG preview of this SVG file: 280 × 280 pixels. Other resolutions: 240 × 240 pixels | 480 × 480 pixels | 768 × 768 pixels | 1,024 × 1,024 pixels | 2,048 × 2,048 pixels.
Original file (SVG file, nominally 280 × 280 pixels, file size: 38 KB)
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| Description | |||
| Date | |||
| Source | Own work | ||
| Author | Inductiveload | ||
| Permission (Reusing this file) |
|
File history
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 23:26, 18 January 2009 | | 280 × 280 (38 KB) | wikimediacommons>Inductiveload | {{Information |Description={{en|1=An implementation of an en:NAND gate using en:Diode transistor logic.}} |Source=Own work by uploader |Author=Inductiveload |Date=2009/01/18 |Permission={{PD-self}} |other_versions= }} < |
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